Description
This report provides market and technical trend information CVD/ALD dielectric and SOD precursors. For the last 20 years, there have been many research papers and patents published regarding ALD and CVD precursors specifically for the semiconductor industry. This report includes detail on the development path and roadmaps for new precursors and any current EHS and regulatory hurdles for these materials to enter into high volume manufacturing (HVM). Forecasts are provided on precursors of all types, with a focus is on the leading-edge front end of the line insulating and conductive materials, including sacrificial layers, low-κ dielectrics, hard masks, mandrel, and etch stop layers. These process areas are of interest because of the high growth potential associated with leading-edge logic <45 nm, 28 nm to 10/7 nm nodes, and the future 5 & 3 nm nodes, as well as advanced DRAM and 3DNAND volatile and non-volatile memories.
Featured Press Release on CVD/Dielectric Precursor Market Updates and Report Highlights:
Table of Contents:
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1 EXECUTIVE SUMMARY 11 1.1 REGIONAL TRENDS – DIELECTRIC PRECURSORS 12 1.2 PRECURSOR MARKET – HISTORICAL AND 5-YEAR FORECAST 13 1.3 DIELECTRIC PRECURSOR REVENUE 2021 TO 2027 (M USD) 14 1.4 TECHNOLOGY TRENDS DIELECTRIC PRECURSORS 15 1.5 CVD AND ALD EQUIPMENT MARKET 16 1.6 ANALYST ASSESSMENT – PRECURSORS 17 2 SCOPE, PURPOSE, AND METHODOLOGY 19 2.1 SCOPE 20 2.2 PURPOSE 21 2.3 METHODOLOGY 22 2.4 OVERVIEW OF OTHER TECHCET CMR™ REPORTS 23 3 SEMICONDUCTOR INDUSTRY MARKET STATUS & OUTLOOK 24 3.1 WORLDWIDE ECONOMY 25 3.1.1 SEMICONDUCTOR INDUSTRIES TIES TO THE GLOBAL ECONOMY 27 3.1.2 SEMICONDUCTOR SALES GROWTH 28 3.1.3 TAIWAN MONTHLY SALES TRENDS 29 3.1.4 UNCERTAINTY ABOUNDS ESPECIALLY FOR 2023 - SLOWER TO NEGATIVE SEMICONDUCTOR REVENUE GROWTH EXPECTED 30 3.2 CHIPS SALES BY ELECTRONIC GOODS SEGMENT 31 3.2.1 SMARTPHONES 32 3.2.2 PC UNIT SHIPMENTS 33 3.2.3 SERVERS / IT MARKET 36 3.3 SEMICONDUCTOR FABRICATION GROWTH & EXPANSION 37 3.3.1 FAB EXPANSION ANNOUNCEMENT SUMMARY 38 3.3.2 WW FAB EXPANSION DRIVING GROWTH 40 3.3.3 EQUIPMENT SPENDING TRENDS 41 3.3.4 TECHNOLOGY ROADMAPS 42 3.3.5 FAB INVESTMENT ASSESSMENT 43 3.4 POLICY & TRADE TRENDS AND IMPACT 44 3.5 SEMICONDUCTOR MATERIALS OVERVIEW 45 3.5.1 COULD MATERIALS CAPACITY LIMIT CHIP PRODUCTION SCHEDULES? 46 3.5.2 LOGISTICS ISSUES EASED DOWN 47 3.5.3 TECHCET WAFER STARTS FORECAST THROUGH 2027 48 3.5.4 TECHCET’S MATERIAL FORECAST 49 4 PRECURSOR MARKET TRENDS 50 4.1 MARKET TRENDS 51 4.1.1 MARKET TRENDS – WAFER STARTS 53 4.1.2 MARKET TRENDS – WAFER STARTS LOGIC 54 4.1.3 MARKET TRENDS – WAFER STARTS DRAM 55 4.1.4 MARKET TRENDS – WAFER STARTS NAND 56 4.2 SUPPLY CAPACITY AND DEMAND, INVESTMENTS 57 4.2.1 WF6 DEMAND DRIVERS 59 4.3 SUPPLY CAPACITY AND DEMAND, INVESTMENTS 60 4.4 REGIONAL TRENDS – DIELECTRIC PRECURSORS 61 4.4.1 REGIONAL TRENDS AND DRIVERS 62 4.5 CVD AND ALD EQUIPMENT MARKET 64 4.5.1 WFE FORECAST: ALL TYPES 65 4.5.2 WFE FORECAST: DEPOSITION, ETCH & CLEAN, LITHOGRAPHY, METROLOGY ETC. 66 4.6 TECHNICAL DRIVERS / MATERIAL CHANGES AND TRANSITIONS BY DEVICE TYPE 67 4.6.1 GENERAL TREND LAST DECADE GOING FROM PVD & LPCVD TO PECVD & ALD 68 4.6.2 ADVANCED LOGIC NODE HVM ESTIMATE 69 4.6.3 DRAM NODE HVM ESTIMATE 75 4.6.4 3D NAND NODE HVM ESTIMATE 78 4.6.5 SUMMARY OF OPPORTUNITIES BY DEVICE SEGMENT 83 4.7 SEMICONDUCTOR PROCESS & MATERIALS TRENDS 84 4.7.1 ETCH PROCESS BY DEVICE TYPE—ATOMIC LAYER ETCHING ALE 85 4.7.2 AREA SELECTIVE DEPOSITION 95 4.7.3 DIRECTED SELF ASSEMBLY (DSA) AND EUV 96 4.7.4 DIRECT SELF ASSEMBLY (DSA) AND EUV 97 4.7.5 2D TRANSITION METAL DICHALCOGENIDES (TMD) 98 4.7.6 DRY RESIST FOR EUV 99 4.7.7 UNDERLAYERS FOR EUV RESIST 102 4.7.8 OTHER APPLICATIONS – OPTICS 104 4.8 EHS AND LOGISTIC ISSUES 105 4.8.1 GREEN HOUSE GASES FROM SEMICONDUCTOR PRODUCTION 106 4.8.2 EUV AND ENERGY 109 4.8.3 ASSESSING THE ENVIRONMENTAL IMPACT OF ATOMIC LAYER DEPOSITION (ALD) PROCESSES AND PATHWAYS TO LOWER IT 110 4.9 CHANGES IN STANDARD PACKAGING/VALVE TYPES 111 5 SEGMENT MARKET STATISTICS AND FORECASTS 112 5.1 PRECURSOR MARKET – HISTORICAL AND 5-YEAR FORECAST 113 5.2 DIELECTRIC PRECURSOR REVENUE 2021 TO 2027 (M USD) 114 5.2.1 ASSESSMENT DIELECTRIC PRECURSORS 115 5.3 M&A ACTIVITIES 117 5.3.1 M&A ACTIVITIES – MERCK & MECARO 118 5.4 NEW PLANTS 119 5.5 SUPPLIER PLANT CLOSURES – NONE REPORTED 124 5.6 NEW ENTRANTS – DRY RESIST CONSORTIUM 125 6 SUB TIER MATERIAL SUPPLY CHAIN 126 6.1 SUB-TIER SUPPLY-CHAIN: INTRODUCTION 127 6.2 LOGISTICS 128 6.2.1 LOGISTICS, CONTINUED 129 6.3 SUB-TIER SUPPLY-CHAIN “NEW” ENTRANTS - NONE REPORTED 130 6.4 SUB-TIER SUPPLY-CHAIN PLANTS UPDATES-NEW – NONE REPORTED 131 6.5 SUB-TIER SUPPLY-CHAIN TECHCET ANALYST ASSESSMENT 132 7 SUPPLIER PROFILES 133 ADEKA CORPORATION AIR LIQUIDE (MAKER, PURIFIER, SUPPLIER) AZMAX CO., LTD CITY CHEMICAL LLC DNF CO., LTD …and 20+ more FIGURES FIGURE 1: HARDMASK, LOW K DIELECTRIC PRECURSORS REGIONAL SHARES 2022 12 FIGURE 2: TOTAL PRECURSOR MARKET, M USD 13 FIGURE 3 DIELECTRIC PRECURSOR MARKET 2021 TO 2027 14 FIGURE 4: CVD AND ALD TOTAL EQUIPMENT MARKET 2022 USD 17-18 BILLION 16 FIGURE 5: GLOBAL ECONOMY AND THE ELECTRONICS SUPPLY CHAIN (2022) 27 FIGURE 6: WORLDWIDE SEMICONDUCTOR SALES 28 FIGURE 7: TECHCET’S TAIWAN SEMICONDUCTOR INDUSTRY INDEX (TTSI)* 29 FIGURE 8: 2023 SEMICONDUCTOR INDUSTRY REVENUE GROWTH FORECASTS 30 FIGURE 9: 2022 SEMICONDUCTOR CHIP APPLICATIONS 31 FIGURE 10: MOBILE PHONE SHIPMENTS WW ESTIMATES 32 FIGURE 11: WORLDWIDE PC AND TABLET FORECAST 33 FIGURE 12: ELECTRIFICATION TREND BY WORLD REGION 34 FIGURE 13: SEMICONDUCTOR AUTOMOTIVE PRODUCTION 35 FIGURE 14: TSMC PHOENIX INVESTMENT ESTIMATED WILL BE US $40 B 37 FIGURE 15: CHIP EXPANSIONS 2022-2027 US$366 B 38 FIGURE 16: SEMICONDUCTOR CHIP MANUFACTURING REGIONS OF THE WORLD 40 FIGURE 17: GLOBAL TOTAL EQUIPMENT SPENDING BY SEGMENT (US$ B) 41 FIGURE 18: OVERVIEW OF ADVANCED LOGIC DEVICE TECHNOLOGY ROADMAP 42 FIGURE 19: INTEL OHIO PLANT SITE FEB. 2023 AND ARTIST RENDERING (ON BOTTOM) 43 FIGURE 20: EUROPE CHIP EXPANSION UPSIDE 46 FIGURE 21: PORT OF LA 47 FIGURE 22: TECHCET WAFER START FORECAST BY NODE SEGMENTS** 48 FIGURE 23: GLOBAL SEMICONDUCTOR MATERIALS OUTLOOK 49 FIGURE 24: FORECASTS – WAFER STARTS 2021 TO 2027 53 FIGURE 25: FORECASTS – WAFER STARTS LOGIC 300 MM 54 FIGURE 26: FORECASTS – WAFER STARTS DRAM 300 MM 55 FIGURE 27: FORECASTS – WAFER STARTS NAND 300 MM 56 FIGURE 28: 3DNAND MARKET SHARE 2022 59 FIGURE 29: HARDMASK, LOW K DIELECTRIC PRECURSORS REGIONAL SHARES 2022 61 FIGURE 30: CVD AND ALD TOTAL EQUIPMENT MARKET 2022 USD 17-18 BILLION 64 FIGURE 31: SEMI 2022 SEMICONDUCTOR EQUIPMENT FORECAST 65 FIGURE 32: 2022 TECHINSIGHTS WFE SPENDING (TOP) AND 2022 GARTNER WFE SPENDING PER NODE (BOTTOM) 66 FIGURE 33: 3D DEVICE ARCHITECTURES 68 FIGURE 34: LOGIC TECHNOLOGY NODE ROADMAP FOR LEADING IDMS 69 FIGURE 35: SAMSUNG START 3 NM PILOT RAMP USING GAA-FET TECHNOLOGY JUNE 2022 70 FIGURE 36: IMEC 2022 LOGIC ROADMAP 71 FIGURE 37: SCALING AND LITHOGRAPHY TRENDS – A HIGH COST IN CAPITAL EXPENDITURE, ENERGY AND EMISSIONS 72 FIGURE 38: APPLIED MATERIALS CENTURA PATTERN SHAPING CLUSTER 73 FIGURE 39: DRAM TECHNOLOGY ROADMAP FOR LEADING IDMS 75 FIGURE 40: IP FILING IN THE FIELD OF 3DRAM IS ACCELERATING 76 FIGURE 41: NAND TECHNOLOGY ROADMAP FOR LEADING IDMS 78 FIGURE 42: PATHWAYS FOR CONTINUED 3D NAND SCALING 79 FIGURE 43: 3DNAND STACK TRENDS FROM <100L TO 4 STACKS 80 FIGURE 44: MEMORY STACK CHALLENGES FOR V-NAND 81 FIGURE 45A: FINFET TO GAA TRANSISTOR DIAGRAMS SHOWING SELECTIVE ETCHING IS NEEDED TO ADD RESS DEVICE COMPLEXITY 85 FIGURE 45B: ALE PROCESS CYCLE 85 FIGURE 46: PERIOD TABLE INDICATING CANDIDATES FOR ALE (ISOTROPIC ETCHING) 86 FIGURE 47: APPLICATION OF ALE (ISOTROPIC ETCH) 87 FIGURE 48: ALD AND ALE COMBO PROCESS 88 FIGURE 49: PLASMA AND THERMAL ALE PROCESSES 89 FIGURE 50: LAM ALE PROCESS 90 FIGURE 51: ALD / ALE PROCESS ROADMAP 91 FIGURE 52: ALE PATENT ACTIVITY BY COMPANY THROUGH 2022 92 FIGURE 53: AREA SELECTIVE SIN DEPOSITION BY ALD (AVS ASD2022) 95 FIGURE 54: DSA AND EUS PROCESSES 96 FIGURE 55: RESIST RECTIFICATION WITH DSA 97 FIGURE 56: TEM AND ARTIST RENDERING OF MONOLAYER CHANNEL FORMATION 98 FIGURE 57: EUV LITHOGRAPHY ENABLING GATE STRUCTURES AND PITCH SCALING. 99 FIGURE 58: DRY RESIST FOR EUV SEM IMAGE 100 FIGURE 59: SPIN ON CARBON (SOC) DIELECTRIC FOR EUV METAL OXIDE RESISTS PATTERNS AFTER LITHO 101 FIGURE 60: UNDERLAYER (DIELECTRIC) HARDMASKS TRENDS FOR NIGH NA EUV 102 FIGURE 61: SPIN ON PRIMER (SOC) VS. HMDS PRIMER 103 FIGURE 62: GREENHOUSE GAS CONTRIBUTIONS OF CHIP FAB MATERIALS AND EQUIPMENT 106 FIGURE 63: ENVIRONMENTAL IMPACT (GWP) OF VARIOUS PROCESSES AND GASES 107 FIGURE 64: CO2EQ OUTPUT FROM ETCH GASES 108 FIGURE 65: TOTAL EMISSIONS AND ENERGY USE PROJECTION PER LOGIC NODE 109 FIGURE 66: ENVIRONMENTAL IMPACT OF ALD 110 FIGURE 67: SEGMENTATION OF THE AMPOULE FLEET 2020 BASED ON NUMBER OF UNITS IN THE FIELD 111 FIGURE 68: TOTAL PRECURSOR MARKET, M USD 113 FIGURE 69: DIELECTRIC PRECURSOR MARKET 2021 TO 2027 114 FIGURE 70: TEOS 116 FIGURE 71: WHAT IS EUV DRY RESIST? 125 FIGURE 72: TYPICAL NON-HALIDE LIGANDS USED FOR ALD PRECURSORS 127 FIGURE 73: EXAMPLES OF PRECURSORS SUPPLIED BY SHIP 128 FIGURE 74: OCEAN CONTAINER PRICE INDEX - JULY ‘20 TO MARCH ’23 129 TABLES TABLE 1: DIELECTRIC PRECURSOR REVENUES BY REGION (US$ M) 12 TABLE 2: 2017 TO 2027 5-YEAR CAGRS 13 TABLE 3: GLOBAL GDP AND SEMICONDUCTOR REVENUES* 25 TABLE 4: IMF ECONOMIC OUTLOOK* 26 TABLE 5: DATA CENTER SYSTEMS AND COMMUNICATION SERVICES MARKET SPENDING 2022 36 TABLE 6: DIELECTRIC PRECURSOR MARKET SIZE BY REGION 61 TABLE 7: REGIONAL WAFER MARKETS 62 TABLE 8: REGIONAL PRECURSOR MARKETS 63 TABLE 9: OVERVIEW OF DEPOSITION PROCESSES BY DEVICE TYPE AND MATERIAL FOR LOGIC DEVICES 74 TABLE 10: OVERVIEW OF DEPOSITION PROCESSES BY DEVICE TYPE AND MATERIAL FOR DRAM 77 TABLE 11: OVERVIEW OF DEPOSITION PROCESSES BY DEVICE TYPE AND MATERIAL FOR 3DNAND 82 TABLE 12: GAS TRENDS AND OPPORTUNITIES BY DEVICE TYPE 83 TABLE 13: PRECURSOR 5-YEAR CAGR COMPARISON 113
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